Invention Grant
- Patent Title: Method of segmenting semiconductor wafer
- Patent Title (中): 分割半导体晶圆的方法
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Application No.: US12667318Application Date: 2008-08-07
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Publication No.: US08110481B2Publication Date: 2012-02-07
- Inventor: Kiyoshi Arita , Atsushi Harikai
- Applicant: Kiyoshi Arita , Atsushi Harikai
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Pearne & Gordon LLP
- Priority: JPP2007-205201 20070807
- International Application: PCT/JP2008/064567 WO 20080807
- International Announcement: WO2009/020245 WO 20090212
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
To provide a method of segmenting a semiconductor wafer, which is capable of preventing chippings.A semiconductor wafer 1 is partitioned into a circumferential ring-shaped region 1a and a segmentation region placed in the inner side of the ring-shaped region 1a. The semiconductor wafer 1 included in the segmentation region is cut into the form of a lattice along a plurality of perpendicular cutting lines 4 and is segmented into a plurality of chips 2. On the other hand, the semiconductor wafer 1 included in the ring-shaped region 1a is cut along two partition lines 5 extending in parallel to the cutting lines 4 from the center O of the semiconductor wafer 1 and is partitioned into four independent regions.
Public/Granted literature
- US20100197115A1 METHOD OF SEGMENTING SEMICONDUCTOR WAFER Public/Granted day:2010-08-05
Information query
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