Invention Grant
- Patent Title: Structure for charge dissipation during fabrication of integrated circuits and isolation thereof
- Patent Title (中): 集成电路制造过程中电荷耗散的结构及其分离
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Application No.: US12166362Application Date: 2008-07-02
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Publication No.: US08110875B2Publication Date: 2012-02-07
- Inventor: John Joseph Ellis-Monaghan , Jeffrey Peter Gambino , Timothy Dooling Sullivan , Steven Howard Voldman
- Applicant: John Joseph Ellis-Monaghan , Jeffrey Peter Gambino , Timothy Dooling Sullivan , Steven Howard Voldman
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Schmeiser, Olsen & Watts
- Agent Anthony J. Canale
- Main IPC: H01L23/62
- IPC: H01L23/62

Abstract:
A structure for dissipating charge during fabrication of an integrated circuit. The structure includes: a substrate contact in a semiconductor substrate; one or more wiring levels over the substrate; one or more electrically conductive charge dissipation structures extending from a top surface of an uppermost wiring level of the one or more wiring levels through each lower wiring level of the one or more wiring levels to and in electrical contact with the substrate contact; and circuit structures in the substrate and in the one or more wiring layers, the charge dissipation structures not electrically contacting any the circuit structures in any of the one or more wiring levels, the one or more charge dissipation structures dispersed between the circuit structures.
Public/Granted literature
- US20080265422A1 STRUCTURE FOR CHARGE DISSIPATION DURING FABRICATION OF INTEGRATED CIRCUITS AND ISOLATION THEREOF Public/Granted day:2008-10-30
Information query
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