Invention Grant
US08110875B2 Structure for charge dissipation during fabrication of integrated circuits and isolation thereof 有权
集成电路制造过程中电荷耗散的结构及其分离

Structure for charge dissipation during fabrication of integrated circuits and isolation thereof
Abstract:
A structure for dissipating charge during fabrication of an integrated circuit. The structure includes: a substrate contact in a semiconductor substrate; one or more wiring levels over the substrate; one or more electrically conductive charge dissipation structures extending from a top surface of an uppermost wiring level of the one or more wiring levels through each lower wiring level of the one or more wiring levels to and in electrical contact with the substrate contact; and circuit structures in the substrate and in the one or more wiring layers, the charge dissipation structures not electrically contacting any the circuit structures in any of the one or more wiring levels, the one or more charge dissipation structures dispersed between the circuit structures.
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