Invention Grant
- Patent Title: Semiconductor device and method for manufacturing same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US12408390Application Date: 2009-03-20
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Publication No.: US08110924B2Publication Date: 2012-02-07
- Inventor: Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Daisuke Minohara
- Applicant: Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Daisuke Minohara
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Priority: JP2008-078701 20080325; JP2008-212253 20080820
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
In a DC-DC converter, a multilayer wiring layer is provided on a silicon substrate, and a control circuit configured to control an input circuit and an output circuit is formed in the silicon substrate and the multilayer wiring layer. Moreover, a sealing resin layer covering the multilayer wiring layer and a connecting member connected to an uppermost wiring of the multilayer wiring layer, penetrating the sealing resin layer and having an upper end portion protruding from an upper surface of the sealing resin layer are provided. The upper end portion of the connecting member is formed from a protruding electrode. Horizontal cross-sectional area of the connecting member connected to terminals of the output circuit is larger than horizontal cross-sectional area of the connecting member connected to terminals of the control circuit.
Public/Granted literature
- US20090243087A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2009-10-01
Information query
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