A reference voltage generating circuit in a semiconductor memory apparatus comprises a driving control signal generating unit configured to generate a driving control signal according to a temperature variation, wherein the driving control signal generating unit is enabled in response to a power-up signal, a driving unit configured to control a voltage level, which is applied to a voltage transfer node, in response to the power-up signal and the driving control signal, and a reference voltage generating unit configured to generate a reference voltage when a voltage level on the voltage transfer node is higher than a predetermined voltage level.