Invention Grant
- Patent Title: Semiconductor integrated circuit, semiconductor storage device and impedance adjustment method
- Patent Title (中): 半导体集成电路，半导体存储器件和阻抗调整方法
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Application No.: US12846333Application Date: 2010-07-29
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Publication No.: US08111085B2Publication Date: 2012-02-07
- Inventor: Takayuki Ibaraki , Shinya Tashiro
- Applicant: Takayuki Ibaraki , Shinya Tashiro
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2009-186336 20090811
- Main IPC: H03K19/003
- IPC: H03K19/003
Abstract:
It is desired to reduce the current consumption of an autonomous impedance adjustment circuit. The semiconductor integrated circuit according to the present invention stops the change in the drive capability of a driver correspondingly to the output (count data) of a comparator which is sequentially outputted for changing the drive capability of a replica driver and an output driver.
Public/Granted literature
- US20110037496A1 SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR STORAGE DEVICE AND IMPEDANCE ADJUSTMENT METHOD Public/Granted day:2011-02-17
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