Invention Grant
- Patent Title: Level shifter with balanced duty cycle
- Patent Title (中): 电平移位器具有平衡占空比
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Application No.: US12767370Application Date: 2010-04-26
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Publication No.: US08111088B2Publication Date: 2012-02-07
- Inventor: Ankit Srivastava , Xiaohong Quan
- Applicant: Ankit Srivastava , Xiaohong Quan
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Sam Talpalatsky; Nicholas J. Pauley; Jonathan T. Velasco
- Main IPC: H03K19/0175
- IPC: H03K19/0175 ; H03K19/094

Abstract:
A level shifter and method are provided for balancing a duty cycle of a signal. An input circuit receives a differential logic signal with two complimentary logic levels. A level transition balancing circuit balances the rise and fall times of a level shifted version of each complimentary logic level during a transition from a first to a second of the logic levels and a level shift. A logic element stores and provides outputs of the level shifted versions of the logic levels. The level transition balancing circuit can include a capacitor in parallel with a transfer element for each input. The capacitor destabilizes inputs to the logic element and balances the transition using a capacitance and a level previously stored in the logic element.
Public/Granted literature
- US20110260753A1 Level Shifter with Balanced Duty Cycle Public/Granted day:2011-10-27
Information query
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