Invention Grant
- Patent Title: Building block for a secure CMOS logic cell library
- Patent Title (中): 用于安全CMOS逻辑单元库的构建块
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Application No.: US12786205Application Date: 2010-05-24
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Publication No.: US08111089B2Publication Date: 2012-02-07
- Inventor: Ronald P. Cocchi , James P. Baukus , Bryan J. Wang , Lap Wai Chow , Paul Ouyang
- Applicant: Ronald P. Cocchi , James P. Baukus , Bryan J. Wang , Lap Wai Chow , Paul Ouyang
- Applicant Address: US CA Westminster US CA San Jose
- Assignee: Syphermedia International, Inc.,Promtek Programmable Memory Technology, Inc.
- Current Assignee: Syphermedia International, Inc.,Promtek Programmable Memory Technology, Inc.
- Current Assignee Address: US CA Westminster US CA San Jose
- Agency: Gates & Cooper LLP
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/20 ; H03K19/094

Abstract:
A logical building block and method of using the building block to design a logic cell library for CMOS (Complementary Metal Oxide Silicon) ASICs (Application Specific Integrated Circuits) is disclosed. Different logic gates, built with the same building block as described in this invention, will have the same schematics of transistor connection and also the same physical layout so that they appear to be physically identical under optical or electron microscopy. An ASIC designed from a library of such logic cells is strongly resistant to a reverse engineering attempt.
Public/Granted literature
- US20100301903A1 BUILDING BLOCK FOR A SECURE CMOS LOGIC CELL LIBRARY Public/Granted day:2010-12-02
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