A memristor-protection integrated circuit. The memristor-protection integrated circuit includes a first current-bias circuit, a second current-bias circuit, an inverter, and a current limiter. The first and second current-bias circuits are configured to be coupled to first and second power-supply rails, respectively. The inverter is coupled to the first current-bias circuit and to the second current-bias circuit, and is configured to couple at least one memristor to at least one of the first current-bias circuit and the second current-bias circuit in response to an input signal applied to the inverter. The current limiter is coupled to the first current-bias circuit and coupled to the second current-bias circuit, and is configured to limit current flowing through the memristor.