Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US12556299Application Date: 2009-09-09
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Publication No.: US08111536B2Publication Date: 2012-02-07
- Inventor: Hiroshi Maejima
- Applicant: Hiroshi Maejima
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-297468 20081121
- Main IPC: G11C5/06
- IPC: G11C5/06

Abstract:
The memory cell array has memory cells each positioned at respective intersections between a plurality of first wirings and a plurality of second wirings. Each of the memory cells has a rectifier element and a variable resistance element connected in series. The resistance element may have at least a first resistance value and a second resistance value higher than the first resistance value. The contact arrangement portion is formed to arrange a plurality of contacts on a plane. The contacts are connected to the first wirings or the second wirings. The probe can move along the plane to electrically contact with either of the contacts.
Public/Granted literature
- US20100128508A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2010-05-27
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