Invention Grant
US08111550B2 M+N bit programming and M+L bit read for M bit memory cells
有权
对M位存储单元进行M + N位编程和M + L位读取
- Patent Title: M+N bit programming and M+L bit read for M bit memory cells
- Patent Title (中): 对M位存储单元进行M + N位编程和M + L位读取
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Application No.: US13005291Application Date: 2011-01-12
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Publication No.: US08111550B2Publication Date: 2012-02-07
- Inventor: Vishal Sarin , Jung-Sheng Hoei , Frankie F. Roohparvar
- Applicant: Vishal Sarin , Jung-Sheng Hoei , Frankie F. Roohparvar
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A memory device and programming and/or reading process is described that programs and/or reads the cells in the memory array with higher threshold voltage resolution than required. In programming non-volatile memory cells, this allows a more accurate threshold voltage placement during programming and enables pre-compensation for program disturb, increasing the accuracy of any subsequent read or verify operation on the cell. In reading/sensing memory cells, the increased threshold voltage resolution allows more accurate interpretations of the programmed state of the memory cell and also enables more effective use of probabilistic data encoding techniques such as convolutional code, partial response maximum likelihood (PRML), low-density parity check (LDPC), Turbo, and Trellis modulation encoding and/or decoding, reducing the overall error rate of the memory.
Public/Granted literature
- US20110103145A1 M+N BIT PROGRAMMING AND M+L BIT READ FOR M BIT MEMORY CELLS Public/Granted day:2011-05-05
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