Invention Grant
US08111572B2 Disturb control circuits and methods to control memory disturbs among multiple layers of memory
失效
干扰控制电路和控制多层存储器之间存储器干扰的方法
- Patent Title: Disturb control circuits and methods to control memory disturbs among multiple layers of memory
- Patent Title (中): 干扰控制电路和控制多层存储器之间存储器干扰的方法
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Application No.: US12001952Application Date: 2007-12-12
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Publication No.: US08111572B2Publication Date: 2012-02-07
- Inventor: Robert Norman
- Applicant: Robert Norman
- Assignee: Unity Semiconductor Corporation
- Current Assignee: Unity Semiconductor Corporation
- Main IPC: G11C7/02
- IPC: G11C7/02

Abstract:
Embodiments of the invention relate generally to data storage and computer memory, and more particularly, to systems, integrated circuits and methods for controlling memory disturbs to and among multiple layers of memory that include, for example, third dimensional memory technology. Each layer of memory can include a plurality of non-volatile memory cells that store data as a plurality of conductivity profiles that can be non-destructively read by applying a read voltage across a selected non-volatile memory cell. Data can be written to a selected non-volatile memory cell by applying a write voltage having a predetermined magnitude and polarity across the selected non-volatile memory cell. Stored data is retained in the plurality of non-volatile memory cells in the absence of power.
Public/Granted literature
- US20090154232A1 Disturb control circuits and methods to control memory disturbs among multiple layers of memory Public/Granted day:2009-06-18
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