Invention Grant
US08112555B2 Peripheral adapter interrupt frequency control by estimating processor load at the peripheral adapter
有权
通过估算外设适配器处理器负载来进行外设适配器中断频率控制
- Patent Title: Peripheral adapter interrupt frequency control by estimating processor load at the peripheral adapter
- Patent Title (中): 通过估算外设适配器处理器负载来进行外设适配器中断频率控制
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Application No.: US12550309Application Date: 2009-08-28
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Publication No.: US08112555B2Publication Date: 2012-02-07
- Inventor: Vaijayanthimala K. Anand , Janice Marie Girouard , Emily Jane Ratliff
- Applicant: Vaijayanthimala K. Anand , Janice Marie Girouard , Emily Jane Ratliff
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Mitch Harris, Atty at Law, LLC; Andrew M. Harris; Matthew W. Baca
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F5/00

Abstract:
Interrupt frequency control by estimating processor load in the peripheral adapter provides adaptive interrupt latency to improve performance in a processing system. A mathematical function of the depth of one or more queues of the adapter is compared to its historical value in order to provide an estimate of processor load. The estimated processor load is then used to set a parameter that controls the frequency of an interrupt generator, which may be controlled by setting an interrupt queue depth threshold, packet frequency threshold or interrupt hold-off time value. The mathematical function may be the ratio of the transmit queue depth to the receive queue depth and the historical value may be predetermined, user-settable, obtained during a calibration interval or obtained by taking a long-term average of the mathematical function of the queue depths.
Public/Granted literature
- US20100274938A1 PERIPHERAL ADAPTER INTERRUPT FREQUENCY CONTROL BY ESTIMATING PROCESSOR LOAD AT THE PERIPHERAL ADAPTER Public/Granted day:2010-10-28
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