Invention Grant
US08112563B2 Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto
有权
包括第一半导体芯片和与其连接的第二半导体芯片的布置
- Patent Title: Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto
- Patent Title (中): 包括第一半导体芯片和与其连接的第二半导体芯片的布置
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Application No.: US10727102Application Date: 2003-12-02
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Publication No.: US08112563B2Publication Date: 2012-02-07
- Inventor: Jens Barrenscheen , Peter Rohm , Hannes Estl , Axel Aue , Jens Graf , Herman Roozenbeek
- Applicant: Jens Barrenscheen , Peter Rohm , Angela Rohm, legal representative , Hannes Estl , Axel Aue , Jens Graf , Herman Roozenbeek
- Applicant Address: DE DE
- Assignee: Infineon Technologies AG,Robert Bosch GmbH
- Current Assignee: Infineon Technologies AG,Robert Bosch GmbH
- Current Assignee Address: DE DE
- Agency: Dickstein Shapiro LLP
- Priority: EP02026775 20021202
- Main IPC: G06F13/12
- IPC: G06F13/12 ; G06F13/38
Abstract:
An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The diagnostic data are transmitted via a first transmission channel and the load control data and the pilot data are transmitted via a second transmission channel.
Public/Granted literature
- US20040232449A1 Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto Public/Granted day:2004-11-25
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