Invention Grant
- Patent Title: Pipelined buffer interconnect with trigger core controller
- Patent Title (中): 与触发核心控制器的流水线缓冲器互连
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Application No.: US11905954Application Date: 2007-10-05
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Publication No.: US08112570B2Publication Date: 2012-02-07
- Inventor: Scott Krig
- Applicant: Scott Krig
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Sterne, Kessler, Goldstein & Fox PLLC
- Main IPC: G06F13/36
- IPC: G06F13/36

Abstract:
A method and system to transfer a data stream from a data source to a data sink are described herein. The system comprises a trigger core, a plurality of dedicated buffers and a plurality of dedicated buses coupled to the plurality of buffers, trigger core, the data source and the data sink. In response to receiving a request for a data transfer from a data source to a data sink, the trigger core assigns a first buffer and a first bus to the data source for writing data, locks the first buffer and first bus, releases the first buffer and the first bus upon indication from the data source of completion of data transfer to the first buffer, assigns the first buffer and first bus to the data sink for reading data and assigns a second buffer and second bus to the data source for writing data thereby pipelining the data transfer from the data source to the data sink.
Public/Granted literature
- US20080228896A1 Pipelined buffer interconnect with trigger core controller Public/Granted day:2008-09-18
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