Invention Grant
US08112684B2 Input linking circuitry connected to test mode select and enables
有权
连接到测试模式的输入链接电路选择并使能
- Patent Title: Input linking circuitry connected to test mode select and enables
- Patent Title (中): 连接到测试模式的输入链接电路选择并使能
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Application No.: US13101730Application Date: 2011-05-05
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Publication No.: US08112684B2Publication Date: 2012-02-07
- Inventor: Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Vij
- Applicant: Lee D. Whetsel , Baher S. Haroun , Brian J. Lasher , Anjali Vij
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.
Public/Granted literature
- US20110214027A1 1149.1 TAP LINKING MODULES Public/Granted day:2011-09-01
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