Invention Grant
US08112730B2 Various methods and apparatuses for memory modeling using a structural primitive verification for memory compilers
有权
用于存储器编译器的结构原语验证的存储器建模的各种方法和装置
- Patent Title: Various methods and apparatuses for memory modeling using a structural primitive verification for memory compilers
- Patent Title (中): 用于存储器编译器的结构原语验证的存储器建模的各种方法和装置
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Application No.: US12249085Application Date: 2008-10-10
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Publication No.: US08112730B2Publication Date: 2012-02-07
- Inventor: Karen Aleksanyan , Karen Amirkhanyan , Sergey Karapetyan , Alexander Shubat , Samvel Shoukourian , Valery Vardanian , Yervant Zorian
- Applicant: Karen Aleksanyan , Karen Amirkhanyan , Sergey Karapetyan , Alexander Shubat , Samvel Shoukourian , Valery Vardanian , Yervant Zorian
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fenwick & West LLP
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50
Abstract:
A structural primitive verification tool for memory compilers is described. A first set of memory structural primitives are supplied by a designer by filling in fields of a presented user interface. The first set of structural primitives describe certain physical layout features of a proposed memory array in an integrated circuit. A first model of a memory instance derived from the first set of memory structural primitives supplied by the designer is compared to a second model of a memory instance derived from a memory layout file from a memory compiler under-test. The first model is verified against the second model to verify to an integrity of the first set of memory structural primitives supplied by the designer compared to the memory layout file derived from a second set of memory structural primitives configuring that memory instance from the memory compiler.
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