Invention Grant
US08119495B2 Method of manufacturing a semiconductor device having an active region and dummy patterns
有权
制造具有有源区域和虚拟图案的半导体器件的方法
- Patent Title: Method of manufacturing a semiconductor device having an active region and dummy patterns
- Patent Title (中): 制造具有有源区域和虚拟图案的半导体器件的方法
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Application No.: US13096246Application Date: 2011-04-28
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Publication No.: US08119495B2Publication Date: 2012-02-21
- Inventor: Kenichi Kuroda , Kozo Watanabe , Hirohiko Yamamoto
- Applicant: Kenichi Kuroda , Kozo Watanabe , Hirohiko Yamamoto
- Applicant Address: JP Kanagawa JP Tokyo
- Assignee: Renesas Electronics Corporation,Hitachi ULSI Systems Co., Ltd.
- Current Assignee: Renesas Electronics Corporation,Hitachi ULSI Systems Co., Ltd.
- Current Assignee Address: JP Kanagawa JP Tokyo
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2000-353045 20001120
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be placed up to the area near the boundary BL between the element forming region DA and dummy region FA by placing the first dummy pattern DP1 of relatively wider area and the second dummy pattern DP2 of relatively small area in the dummy region FA. Thereby, the flatness of the surface of the silicon oxide film embedded within the isolation groove can be improved over the entire part of the dummy region FA. Moreover, an increase of the mask data can be controlled when the first dummy patterns DP1 occupy a relatively wide region among the dummy region FA.
Public/Granted literature
- US20110207288A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME AND DESIGNING THE SAME Public/Granted day:2011-08-25
Information query
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