Invention Grant
- Patent Title: Method of manufacturing a semiconductor integrated circuit device including elimination of static charge of a treated wafer
- Patent Title (中): 制造半导体集成电路器件的方法，包括消除经处理晶片的静电荷
-
Application No.: US12123584Application Date: 2008-05-20
-
Publication No.: US08119547B2Publication Date: 2012-02-21
- Inventor: Yoshiaki Kobayashi
- Applicant: Yoshiaki Kobayashi
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2000-311480 20001012
- Main IPC: H01L21/02
- IPC: H01L21/02
Abstract:
A sealed type container accommodating a semiconductor substrate is positioned to a load port of a semiconductor manufacturing apparatus. The semiconductor substrate is taken out of the container. An ionizer is used for static-charge-eliminating the semiconductor substrates before and after process treatment in a transport area between the load port and a treatment section. The static-charge-eliminated semiconductor substrate is accommodated in the container positioned to the load port. Thus, it is possible to decrease foreign materials adhering to the semiconductor substrate and errors in handling the semiconductor substrate.
Public/Granted literature
- US20090023303A1 METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2009-01-22
Information query
IPC分类:
