Invention Grant
- Patent Title: LDMOS with double LDD and trenched drain
- Patent Title (中): LDMOS具有双LDD和沟槽漏极
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Application No.: US13005991Application Date: 2011-01-13
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Publication No.: US08120106B2Publication Date: 2012-02-21
- Inventor: Fu-Yuan Hsieh
- Applicant: Fu-Yuan Hsieh
- Applicant Address: TW Kaohsiung
- Assignee: Force MOS Technology Co., Ltd.
- Current Assignee: Force MOS Technology Co., Ltd.
- Current Assignee Address: TW Kaohsiung
- Agency: Bacon & Thomas, PLLC
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A LDMOS with double LDD and trenched drain is disclosed. According to some preferred embodiment of the present invention, the structure contains a double LDD region, including a high energy implantation to form lightly doped region and a low energy implantation thereon to provide a low resistance path for current flow without degrading breakdown voltage. At the same time, a P+ junction made by source mask is provided underneath source region to avoid latch-up effect from happening.
Public/Granted literature
- US20110108913A1 LDMOS WITH DOUBLE LDD AND TRENCHED DRAIN Public/Granted day:2011-05-12
Information query
IPC分类: