Invention Grant
US08120183B2 Method of forming top electrode for capacitor and interconnection in integrated passive device (IPD) 有权
在集成无源器件(IPD)中形成电容器和互连顶电极的方法

Method of forming top electrode for capacitor and interconnection in integrated passive device (IPD)
Abstract:
A method of manufacturing a semiconductor device includes providing a substrate having a first conductive layer disposed on a top surface of the substrate. A high resistivity layer is formed over the substrate and the first conductive layer. A dielectric layer is deposited over the substrate, first conductive layer and high resistivity layer. A portion of the dielectric layer, high resistivity layer, and first conductive layer forms a capacitor stack. A first passivation layer is formed over the dielectric layer. A second conductive layer is formed over the capacitor stack and a portion of the first passivation layer. A first opening is etched in the dielectric layer to expose a surface of the high resistivity layer. A third and fourth conductive layer is deposited over the first opening in the dielectric layer and a portion of the first passivation layer.
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