Invention Grant
- Patent Title: Integrated circuit package system employing device stacking and method of manufacture thereof
- Patent Title (中): 集成电路封装系统采用器件堆叠及其制造方法
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Application No.: US12892941Application Date: 2010-09-29
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Publication No.: US08120187B2Publication Date: 2012-02-21
- Inventor: Frederick Rodriguez Dahilig , Sheila Marie L. Alvarez , Antonio B. Dimaano, Jr. , Dioscoro A. Merilo
- Applicant: Frederick Rodriguez Dahilig , Sheila Marie L. Alvarez , Antonio B. Dimaano, Jr. , Dioscoro A. Merilo
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agent Mikio Ishimaru
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L29/41 ; H01L21/58 ; H01L21/60
Abstract:
A method of manufacture of an integrated circuit package system that includes: providing an electrical interconnect system including an inner lead-finger system and an outer lead-finger system; stacking a first device, a second device, and a third device between and over the electrical interconnect system; connecting the first device and the second device to the inner lead-finger system; and connecting the third device to the outer lead-finger system.
Public/Granted literature
- US20110012270A1 INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2011-01-20
Information query
IPC分类:
