Invention Grant
- Patent Title: Impedance-based power supply switch optimization
- Patent Title (中): 基于阻抗的电源开关优化
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Application No.: US12484692Application Date: 2009-06-15
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Publication No.: US08120208B2Publication Date: 2012-02-21
- Inventor: Toshinari Takayanagi , Shingo Suzuki
- Applicant: Toshinari Takayanagi , Shingo Suzuki
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Lawrence J. Merkel
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
In one embodiment, a power gated circuit block includes power switches that couple at least one of the power supply grids within the block to the global power supply grids of the integrated circuit. The power switches receive an enable that indicates whether or not the power gated block is enabled or disabled. If the power gated block is enabled, the power switches are turned on and electrically connect the global power supply grid with the internal (or local) power supply grid; otherwise the power switches electrically isolate the local power supply grid from the global power supply grid. The power switches are physically distributed over an area occupied by the power gated block, including near an edge of the area. The number of power switches near the edge is greater than the number of switches included at other locations in the area to provide a worst case impedance experienced at points throughout the area that is approximately equal.
Public/Granted literature
- US20100314948A1 Impedance-Based Power Supply Switch Optimization Public/Granted day:2010-12-16
Information query
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