Invention Grant
US08120378B2 System to control insertion of care-bits in an IC test vector improved optical probing
有权
用于控制IC测试矢量中插入点的系统,用于改进光学探测
- Patent Title: System to control insertion of care-bits in an IC test vector improved optical probing
- Patent Title (中): 用于控制IC测试矢量中插入点的系统,用于改进光学探测
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Application No.: US12873126Application Date: 2010-08-31
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Publication No.: US08120378B2Publication Date: 2012-02-21
- Inventor: Joseph Swenton , Thomas Bartenstein , Richard Schoonover , David Sliwinski
- Applicant: Joseph Swenton , Thomas Bartenstein , Richard Schoonover , David Sliwinski
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: G01R31/00
- IPC: G01R31/00

Abstract:
Systems, methods, and computer readable media storing instructions for such methods relate to generating test vectors that can be used for exercising a particular area of interest in an integrated circuit. The test vectors generally include a non-overlapping repeating and/or predictable sequence of care bits (a care bit pattern) that can be used by a tester to cause the exercise of the area and collect emissions caused by exercising the area. Such emissions can be used for analysis and debugging of the circuit and/or a portion of it. Aspects can include providing a synchronization signal that can be used by a tester to allow sensor activation at appropriate times.
Public/Granted literature
- US20100321055A1 IC TEST VECTOR GENERATOR FOR SYNCHRONIZED PHYSICAL PROBING Public/Granted day:2010-12-23
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