A gates-line driving circuit of a display device includes a plurality of stages that are serially connected to each other, where each stage includes a plurality of transistors and a plurality of capacitors and receives a scanning start signal, a plurality of clock signals, and first and second gate-off voltages Voff1 and Voff2 of different magnitudes, where some of the transistors are turned off with the first gate-off voltage, and others of the transistors are turned off with the second gate-off voltage.