Invention Grant
US08121240B1 Statistical measurement of average edge-jitter placement on a clock signal 有权
对时钟信号的平均边缘抖动放置的统计测量

  • Patent Title: Statistical measurement of average edge-jitter placement on a clock signal
  • Patent Title (中): 对时钟信号的平均边缘抖动放置的统计测量
  • Application No.: US10990045
    Application Date: 2004-11-16
  • Publication No.: US08121240B1
    Publication Date: 2012-02-21
  • Inventor: Ajay Dalvi
  • Applicant: Ajay Dalvi
  • Applicant Address: US CA San Jose
  • Assignee: Xilinx, Inc.
  • Current Assignee: Xilinx, Inc.
  • Current Assignee Address: US CA San Jose
  • Agent Scott Hewett; Michael R. Hardaway; LeRoy D. Maunu
  • Main IPC: H04L7/00
  • IPC: H04L7/00 H04L25/00 H04L25/40
Statistical measurement of average edge-jitter placement on a clock signal
Abstract:
Phase shift is added between a uttering clock signal and a data bit stream clocked by the clock signal. The phase shift is adjusted until half the data bits are captured (counted) over a measurement period. Adding this amount of phase shift between the clock and data signals centers the average clock edge placement. In a particular embodiment, counters, each having N bits where N is an integer, are used to count clock pulses and data bits. When one counter is full and the most-significant bit on the other counter goes high, the phase shift between the data and clock signal places the average clock edge at the data bit edge.
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