Invention Grant
- Patent Title: Integrated circuit modeling based on empirical test data
- Patent Title (中): 基于经验测试数据的集成电路建模
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Application No.: US12420891Application Date: 2009-04-09
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Publication No.: US08121822B2Publication Date: 2012-02-21
- Inventor: Emrah Acar , Kanak B. Agarwal , Damir Jamsek , Sani R. Nassif
- Applicant: Emrah Acar , Kanak B. Agarwal , Damir Jamsek , Sani R. Nassif
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Frances Lammes; Stephen J. Walder, Jr,; Libby Z. Toub
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F3/00

Abstract:
In accordance with one embodiment, a plurality of empirical measurements of a fabricated integrated circuit including a fabricated transistor having multiple terminals is received. The plurality of empirical measurements each include an empirical terminal current set and an empirical terminal voltage set for the terminals of the fabricated transistor. A mathematical simulation model of a simulated transistor is also received. Utilizing the mathematical simulation model, an intermediate data set is calculated by determining, for each of a plurality of different terminal voltage sets, a simulated terminal current set and a simulated terminal charge set. A modeling tool processes the intermediate data set to obtain a time domain simulation model of the fabricated transistor that, for each of the plurality of empirical measurements, provides a simulated terminal charge set. The time domain simulation model is stored in a computer-readable data storage medium.
Public/Granted literature
- US20100262412A1 INTEGRATED CIRCUIT MODELING BASED ON EMPIRICAL TEST DATA Public/Granted day:2010-10-14
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