Invention Grant
- Patent Title: Error correction coding apparatus
- Patent Title (中): 纠错编码装置
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Application No.: US11886995Application Date: 2006-03-30
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Publication No.: US08122324B2Publication Date: 2012-02-21
- Inventor: Wataru Matsumoto , Rui Sakai , Hideo Yoshida
- Applicant: Wataru Matsumoto , Rui Sakai , Hideo Yoshida
- Applicant Address: JP Tokyo
- Assignee: Mitsubishi Electric Corporation
- Current Assignee: Mitsubishi Electric Corporation
- Current Assignee Address: JP Tokyo
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: JPP2005-101134 20050331
- International Application: PCT/JP2006/306696 WO 20060330
- International Announcement: WO2006/106841 WO 20061012
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
An error correction coding apparatus is disposed to generate a low-density parity-check code 16 from an input information sequence 15 by using a low-density parity-check matrix which satisfies a predetermined weight distribution, and includes a low-density parity-check matrix output means 13 for forming the above-mentioned low-density parity-check matrix by continuously arranging a number of rows in each of which the same number of cyclic-permutation matrices as the row weight are arranged, the number of rows satisfying the above-mentioned predetermined weight distribution, and then gradually increasing or decreasing the row weight, and for outputting the above-mentioned low-density parity-check matrix.
Public/Granted literature
- US20090031186A1 Error correction coding apparatus Public/Granted day:2009-01-29
Information query
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