Invention Grant
- Patent Title: Balancing of load in a network processor
- Patent Title (中): 平衡网络处理器中的负载
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Application No.: US11768353Application Date: 2007-06-26
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Publication No.: US08122455B2Publication Date: 2012-02-21
- Inventor: Manoj Paul , Sanjay Kumar , Udaya Shankara
- Applicant: Manoj Paul , Sanjay Kumar , Udaya Shankara
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F15/173
Abstract:
According to an aspect of the present invention, a scheduler balances the load on the microengines comprising one or more threads allocated to execute a corresponding microblock. The scheduler determines the load on each microengine at regular time intervals. The scheduler balances the load of a heavily loaded microengine by distributing the corresponding load among one or more lightly loaded microengines.
Public/Granted literature
- US20090007133A1 Balancing of Load in a Network Processor Public/Granted day:2009-01-01
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