A frequency synthesizer has a fractional N1 loop and an integer N2 loop. The output frequency of the signal of the fractional N1 loop is constrained to values between adjacent harmonics of a reference frequency used in the fractional N1 loop. The signal of the fractional N1 loop is received by the integer N2 loop. The integer N2 loop provides an output signal. The output signal can be a high frequency signal such as 2-8 GHz signal.