A display system is disclosed. The display system has a processor, a memory, a display device, a display controller configured to control the display device, and a bus connecting the processor, the memory, and the display controller. The display system also has a performance monitoring module configured to monitor events that occur on the bus during operation of the display system, and a performance profiling module configured to calculate, based on the monitored events, an available throughput of the processor on the bus. The display system also has a policy manager module configured to determine a refresh rate for the display controller such that a throughput on the bus required by the display controller is less than the calculated available throughput.