Invention Grant
- Patent Title: Hardware warning protocol for processing units
- Patent Title (中): 处理单元的硬件警告协议
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Application No.: US11934732Application Date: 2007-11-02
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Publication No.: US08127181B1Publication Date: 2012-02-28
- Inventor: Michael C. Shebanow , John S. Montrym , Richard A. Silkebakken , Robert C. Keller
- Applicant: Michael C. Shebanow , John S. Montrym , Richard A. Silkebakken , Robert C. Keller
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson & Sheridan, LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/36

Abstract:
Processing units are configured to capture the unit state in unit level error status registers when a runtime error event is detected in order to facilitate debugging of runtime errors. The reporting of warnings may be disabled or enabled to selectively monitor each processing unit. Warnings for each processing unit are propagated to an exception register in a front end monitoring unit. The warnings are then aggregated and propagated to an interrupt register in a front end monitoring unit in order to selectively generate an interrupt and facilitate debugging. A debugging application may be used to query the interrupt, exception, and unit level error status registers to determine the cause of the error. A default error handling behavior that overrides error conditions may be used in conjunction with the hardware warning protocol to allow the processing units to continue operating and facilitate in the debug of runtime errors.
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