Invention Grant
US08129245B2 Methods of manufacturing power semiconductor devices with shield and gate contacts
有权
制造具有屏蔽和栅极触点的功率半导体器件的方法
- Patent Title: Methods of manufacturing power semiconductor devices with shield and gate contacts
- Patent Title (中): 制造具有屏蔽和栅极触点的功率半导体器件的方法
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Application No.: US13219281Application Date: 2011-08-26
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Publication No.: US08129245B2Publication Date: 2012-03-06
- Inventor: Joseph A. Yedinak , Nathan L. Kraft , Christopher B. Kocon , Richard Stokes
- Applicant: Joseph A. Yedinak , Nathan L. Kraft , Christopher B. Kocon , Richard Stokes
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first conductive layer away inside an active trench, forming a second oxide layer and second conductive layer. The second conductive layer does not extend completely over the first conductive layer in a first region outside of the active trench. The methods further include forming a third oxide layer over the second conductive layer, etching a first opening through the third oxide layer exposing the second conductive layer outside the active trench, etching a second opening through the second oxide layer outside the active trench in the first region exposing the first conductive layer but not the second conductive layer, and filling the first and second openings with conductive material.
Public/Granted literature
- US20110312166A1 Methods of Manufacturing Power Semiconductor Devices with Shield and Gate Contacts Public/Granted day:2011-12-22
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