Invention Grant
- Patent Title: Manufacturing method of preparing a substrate with forming and removing the check patterns in scribing regions before dicing to form semiconductor device
- Patent Title (中): 在切割之前形成和去除划线区域中的检查图案以制备半导体器件的制备方法
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Application No.: US12819379Application Date: 2010-06-21
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Publication No.: US08129259B2Publication Date: 2012-03-06
- Inventor: Yoichi Harayama , Takaharu Yamano
- Applicant: Yoichi Harayama , Takaharu Yamano
- Applicant Address: JP Nagano
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano
- Agency: IPUSA, PLLC
- Priority: JP2009-156803 20090701
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A disclosed device includes a manufacturing method of semiconductor device including preparing a semiconductor substrate including semiconductor chip forming regions, scribing regions surrounding these regions, and cutting regions formed in the scribing regions and narrower than the scribing regions, forming check patterns and semiconductor chips, forming a resist film, forming through grooves narrower than the scribing regions and wider than the check patterns and the cutting regions, removing the check patterns with a wet blast process using the resist film and collectively forming grooves at portions of a protection film and the semiconductor substrate facing the through grooves, removing the resist film, forming internal connection terminals on the contacting faces, forming an insulating resin layer, forming a wiring forming face by removing until connecting faces are exposed, forming wiring patterns, and cutting the semiconductor substrate, the insulating resin layer, and a solder resist layer to separate into individual semiconductor devices.
Public/Granted literature
- US20110003433A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2011-01-06
Information query
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