An electronic component package, includes a package substrate portion constructed by a silicon substrate in which a through hole is provided, an insulating layer formed on both surface sides of the silicon substrate and an inner surface of the through hole, and a through electrode filled in the through hole, and a frame portion provided upright on a peripheral portion of the package substrate portion to constitute a cavity on the silicon substrate, wherein an upper surface of the through electrode in the cavity is planarized such that a height of the through electrode is set equal to a height of the insulating layer. The frame portion is joined to the package substrate portion by the low-temperature joining utilizing the plasma process after the through electrode is planarized.