Invention Grant
- Patent Title: Phase-locked loop circuitry with multiple voltage-controlled oscillators
- Patent Title (中): 具有多个压控振荡器的锁相环电路
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Application No.: US12142746Application Date: 2008-06-19
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Publication No.: US08130044B2Publication Date: 2012-03-06
- Inventor: William W. Bereza , Rakesh H. Patel
- Applicant: William W. Bereza , Rakesh H. Patel
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Treyz Law Group
- Agent G. Victor Treyz; David C. Kellogg
- Main IPC: H03L7/00
- IPC: H03L7/00

Abstract:
Configurable phase-locked loop circuitry is provided. The phase-locked loop circuitry may include a buffer having a buffer output and a multiplexer having inputs and an output. The phase-locked loop circuitry may include multiple voltage-controlled oscillators. The phase-locked loop circuitry may be configured to switch a desired one of the voltage-controlled oscillators into use. Each voltage-controlled oscillator may be controlled by control signals applied to a control input for that voltage-controlled oscillator. The control input of each voltage-controlled oscillator may be connected to the buffer output. The output of each voltage-controlled oscillator may be connected to a respective one of the multiplexer inputs. Power-down transistors may be used to disable unused voltage-controlled oscillators to conserve power. The power-down transistors and the multiplexer may be controlled by signals from programmable elements. One or more of the voltage-controlled oscillators may be implemented using a separate integrated circuit connected using through-silicon vias.
Public/Granted literature
- US20090315627A1 PHASE-LOCKED LOOP CIRCUITRY WITH MULTIPLE VOLTAGE-CONTROLLED OSCILLATORS Public/Granted day:2009-12-24
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