Invention Grant
US08131981B2 SIMD processor performing fractional multiply operation with saturation history data processing to generate condition code flags 有权
SIMD处理器执行具有饱和历史数据处理的分数乘法运算以产生条件码标志

SIMD processor performing fractional multiply operation with saturation history data processing to generate condition code flags
Abstract:
A data processing system, apparatus and method for performing fractional multiply operations is disclosed. The system includes a memory that stores instructions for SIMD operations and a processing core. The processing core includes registers that store operands for the fractional multiply operations. A coprocessor included in the processing core performs the fractional multiply operations on the operands and stores the result in a destination register that is also included in the processing core.
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