Invention Grant
- Patent Title: Printed circuit board design support method and apparatus
- Patent Title (中): 印刷电路板设计支持方法和装置
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Application No.: US12238895Application Date: 2008-09-26
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Publication No.: US08132145B2Publication Date: 2012-03-06
- Inventor: Toshisato Sadamatsu , Shinichi Hama , Shiro Kobayashi
- Applicant: Toshisato Sadamatsu , Shinichi Hama , Shiro Kobayashi
- Applicant Address: JP Tokyo
- Assignee: Canon Kabushiki Kaisha
- Current Assignee: Canon Kabushiki Kaisha
- Current Assignee Address: JP Tokyo
- Agency: Canon U.S.A., Inc. IP Division
- Priority: JP2007-249748 20070926
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method used for supporting designing of a printed circuit board including a plurality of conductive layers having conductive areas to which a constant potential is applied, includes specifying conductive areas having a predetermined wiring from the conductive areas for each of the plurality of conductive layers, extracting areas that overlap each other in a planar view from the specified conductive areas, specifying an interlayer connection member that electrically connects at least two of the plurality of conductive layers in the extracted area, and clearly specifying an area within a predetermined distance from a center of the specified interlayer connection member and in the extracted area.
Public/Granted literature
- US20090083687A1 PRINTED CIRCUIT BOARD DESIGN SUPPORT METHOD AND APPARATUS Public/Granted day:2009-03-26
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