Invention Grant
- Patent Title: System and method for backside circuit editing on full thickness silicon device
- Patent Title (中): 全厚度硅器件背面电路编辑的系统和方法
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Application No.: US12470680Application Date: 2009-05-22
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Publication No.: US08133760B2Publication Date: 2012-03-13
- Inventor: David Winslow Niles , Ronald William Kee
- Applicant: David Winslow Niles , Ronald William Kee
- Applicant Address: SG Singapore
- Assignee: Avago Technologies Enterprise IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies Enterprise IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A system for accessing circuitry on a flip chip circuit device with active circuitry and full-thickness bulk silicon includes a moveable surface for supporting and locating the circuit device in a plane, an infrared (IR) imaging device located at a defined perpendicular distance from a surface of the bulk silicon, the surface of the bulk silicon parallel to the plane and a milling chamber configured to direct an etchant and a focused ion beam to the surface of the bulk silicon, resulting in a gas-enhanced milling process that creates a milled cavity in the bulk silicon. The system produces an IR reflective material located at a base of the cavity, wherein the circuit device is located within a field of view of the IR imaging device such that the IR reflective material is brought into focus by moving the IR imaging device an adjustable distance perpendicular to the surface of the bulk silicon, and where the adjustable perpendicular distance is indicative of a depth of the cavity.
Public/Granted literature
- US20100297787A1 SYSTEM AND METHOD FOR BACKSIDE CIRCUIT EDITING ON FULL THICKNESS SILICON DEVICE Public/Granted day:2010-11-25
Information query
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