Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US12621711Application Date: 2009-11-19
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Publication No.: US08133785B2Publication Date: 2012-03-13
- Inventor: Atsushi Kaneko
- Applicant: Atsushi Kaneko
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2008-297030 20081120
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/40
Abstract:
Provided is a method of manufacturing a semiconductor device, that buried gate electrodes are formed in a pair of trenches in a substrate, so as to be recessed from the level of the top end of the trenches, a base region is formed between a predetermined region located between the pair of trenches, and a source region is formed over the base region.
Public/Granted literature
- US20100123191A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2010-05-20
Information query
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