Invention Grant
US08134152B2 CMOS thin film transistor, method of fabricating the same and organic light emitting display device having laminated PMOS poly-silicon thin film transistor with a top gate configuration and a NMOS oxide thin film transistor with an inverted staggered bottom gate configuration
有权
CMOS薄膜晶体管，其制造方法和具有顶栅配置的层叠PMOS多晶硅薄膜晶体管和具有倒置交错底栅结构的NMOS氧化物薄膜晶体管的有机发光显示装置
- Patent Title: CMOS thin film transistor, method of fabricating the same and organic light emitting display device having laminated PMOS poly-silicon thin film transistor with a top gate configuration and a NMOS oxide thin film transistor with an inverted staggered bottom gate configuration
- Patent Title (中): CMOS薄膜晶体管，其制造方法和具有顶栅配置的层叠PMOS多晶硅薄膜晶体管和具有倒置交错底栅结构的NMOS氧化物薄膜晶体管的有机发光显示装置
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Application No.: US12686550Application Date: 2010-01-13
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Publication No.: US08134152B2Publication Date: 2012-03-13
- Inventor: Jong-Hyun Choi , Sung-Ho Kim
- Applicant: Jong-Hyun Choi , Sung-Ho Kim
- Applicant Address: KR Giheung-Gu, Yongin, Gyunggi-Do
- Assignee: Samsung Mobile Display Co., Ltd.
- Current Assignee: Samsung Mobile Display Co., Ltd.
- Current Assignee Address: KR Giheung-Gu, Yongin, Gyunggi-Do
- Agent Robert E. Bushnell, Esq.
- Priority: KR10-2009-0002650 20090113
- Main IPC: H01L29/12
- IPC: H01L29/12
Abstract:
A CMOS thin film transistor arrangement including a PMOS poly-silicon thin film transistor having a top gate configuration and a NMOS oxide thin film transistor having an inverted staggered bottom gate configuration where both transistors share the same gate electrode. The shared gate electrode is used as a doping or implantation mask in the formation of the source and drain regions of the poly-silicon transistor.
Public/Granted literature
Information query
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