The present disclosure provides a method for testing an integrated circuit having a load impedance. The method includes generating a first test signal having a first frequency and a second test signal having a second frequency, wherein the second frequency is greater than the first frequency, transmitting the first test signal to a substrate having a board circuit operable to process the first signal, transmitting the second test signal to a substrate, wherein the substrate includes an impedance matching circuit operable to transform the load impedance of the integrated circuit into a desired impedance for the second frequency, and sending the first and second test signals to the integrated circuit via the substrate.