Invention Grant
US08134398B2 Device having gate with two buried portions with different widths
有权
具有具有两个具有不同宽度的埋藏部分的门的装置
- Patent Title: Device having gate with two buried portions with different widths
- Patent Title (中): 具有具有两个具有不同宽度的埋藏部分的门的装置
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Application No.: US12946030Application Date: 2010-11-15
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Publication No.: US08134398B2Publication Date: 2012-03-13
- Inventor: Tomohiro Kadoya
- Applicant: Tomohiro Kadoya
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2008-281093 20081031
- Main IPC: H01L27/108
- IPC: H01L27/108
Abstract:
A dummy transistor and a field effect transistor are arranged in a second direction. The dummy transistor is located at least at one end in a second direction.
Public/Granted literature
- US20110057260A1 SEMICONDUCTOR DEVICE Public/Granted day:2011-03-10
Information query
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