Invention Grant
- Patent Title: Synchronization of a data output signal to an input clock
- Patent Title (中): 数据输出信号与输入时钟同步
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Application No.: US12555139Application Date: 2009-09-08
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Publication No.: US08134412B2Publication Date: 2012-03-13
- Inventor: Chris Karabatsos
- Applicant: Chris Karabatsos
- Applicant Address: US DE Dover
- Assignee: Urenschi Assets Limited Liability Company
- Current Assignee: Urenschi Assets Limited Liability Company
- Current Assignee Address: US DE Dover
- Main IPC: H03L7/00
- IPC: H03L7/00

Abstract:
A digital apparatus for phase aligning output signals of a silicon device to an applied input clock signal in same device allows synchronization of data transfers between the device and another device such as a controller. It includes a digital or analog oscillator of higher frequencies than the applied clock and in multiples of powers 2n where n=1, 2, 4, etc., with provisions for synchronization and control by the applied input clock. The main oscillator frequency is subdivided to lower frequencies. An internally derived duplicate frequency clock is phase shifted by either 45 or 22.5 degrees. The system measure both a desired coarse delay, and a fine delay to be applied to the path to phase align the output signal to the phase of the applied input clock.
Public/Granted literature
- US20110181365A1 Synchronization of a Data Output Signal to An Input Clock Public/Granted day:2011-07-28
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