Invention Grant
US08135072B2 CAVLC run before encode with zero cycle costs 有权
CAVLC在零周期成本编码之前运行

CAVLC run before encode with zero cycle costs
Abstract:
An apparatus including a control circuit and an encoder circuit. The control circuit may configured to generate a first control signal and a second control signal. The encoder circuit may be configured to (i) receive a plurality of coefficients, the first control signal and the second control signal and (ii) generate an encoded signal in response to the plurality of coefficients, the first control signal and the second control signal. The encoder circuit may be further configured to simultaneously encode run before syntax elements with the plurality of coefficients.
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