Invention Grant
- Patent Title: CAVLC run before encode with zero cycle costs
- Patent Title (中): CAVLC在零周期成本编码之前运行
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Application No.: US12058343Application Date: 2008-03-28
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Publication No.: US08135072B2Publication Date: 2012-03-13
- Inventor: Scott F. James , Eric C. Pearson
- Applicant: Scott F. James , Eric C. Pearson
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Christopher P. Maiorana, PC
- Main IPC: H04N11/02
- IPC: H04N11/02

Abstract:
An apparatus including a control circuit and an encoder circuit. The control circuit may configured to generate a first control signal and a second control signal. The encoder circuit may be configured to (i) receive a plurality of coefficients, the first control signal and the second control signal and (ii) generate an encoded signal in response to the plurality of coefficients, the first control signal and the second control signal. The encoder circuit may be further configured to simultaneously encode run before syntax elements with the plurality of coefficients.
Public/Granted literature
- US20090034611A1 CAVLC run before encode with zero cycle costs Public/Granted day:2009-02-05
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