A method, apparatus, and computer instructions for providing hardware assistance to prefetch data during execution of code by a process or in the data processing system. In response to loading an instruction in the code into a cache, a determination is made by a processor unit as to whether a prefetch indicator is associated with the instruction. In response to the prefetch indicator being associated with the instruction, a pointer to a data structure identified by the prefetch indicator is selectively prefetched into the cache in the processor.