Invention Grant
- Patent Title: Test mode for multi-chip integrated circuit packages
- Patent Title (中): 多芯片集成电路封装的测试模式
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Application No.: US12885781Application Date: 2010-09-20
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Publication No.: US08136000B2Publication Date: 2012-03-13
- Inventor: Theodore T. Pekny
- Applicant: Theodore T. Pekny
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P. A.
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
When a test mode of a controller of a multi-chip integrated circuit package is activated, external signal lines coupled to the controller are re-mapped to signal lines of one of the integrated circuit devices of the multi-chip integrated circuit package to permit direct testing of the integrated circuit device.
Public/Granted literature
- US20110007539A1 TEST MODE FOR MULTI-CHIP INTEGRATED CIRCUIT PACKAGES Public/Granted day:2011-01-13
Information query
