Invention Grant
US08136058B2 Method and system for representing geometrical layout design data in electronic design systems
有权
在电子设计系统中表示几何布局设计数据的方法和系统
- Patent Title: Method and system for representing geometrical layout design data in electronic design systems
- Patent Title (中): 在电子设计系统中表示几何布局设计数据的方法和系统
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Application No.: US11912152Application Date: 2007-02-27
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Publication No.: US08136058B2Publication Date: 2012-03-13
- Inventor: Ravi R Pai
- Applicant: Ravi R Pai
- Priority: IN375/CHE/2006 20060302
- International Application: PCT/IN2007/000093 WO 20070227
- International Announcement: WO2007/099562 WO 20070907
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method and system of representing geometrical layout design data having a plurality of polygons in electronic design systems is provided. The method includes extracting topological characteristics data corresponding to one or more polygons to form one or more virtual topological polygon. Each virtual polygon is represented by Scan order (SO), with SO corresponding to order in which the vertices of polygon are encountered by a sweep line moving in predefined direction with a predefined angular orientation. The method further includes determining dimensional data corresponding to each polygon to form one or more sized polygons using one or more virtual topological polygon. Thereafter, the spatial data corresponding to each sized polygon is extracted to instantiate each sized polygon.
Public/Granted literature
- US20080231629A1 Method and System for Representing Geometrical Layout Design Data in Electronic Design Systems Public/Granted day:2008-09-25
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