Invention Grant
- Patent Title: Indeterminate state logic insertion
- Patent Title (中): 不确定状态逻辑插入
-
Application No.: US12257610Application Date: 2008-10-24
-
Publication No.: US08136059B2Publication Date: 2012-03-13
- Inventor: Robert Glen Gerowitz , Michael Patrick Muhlada , Chad Everett Winemiller
- Applicant: Robert Glen Gerowitz , Michael Patrick Muhlada , Chad Everett Winemiller
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yee & Associates, P.C.
- Agent Daniel H. Schnurmann
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Illustrative embodiments provide a computer-implemented method for resolving indeterminate states by inserting logic into a design. The computer-implemented method receives an original design input from a requester to form a received input and determines whether the received input contains an indeterminate output. Responsive to a determination that the received input contains an indeterminate output, the computer-implemented method generates a temporary design from the received input, wherein the temporary design contains “unique” output and all inputs, updates the temporary design, and synthesizes the original design and each temporary design individually to form a synthesized original design and a set of synthesized temporary designs. The computer-implemented method merges the synthesized original design with the set of synthesized temporary design to form a final design; and returns the final design to the requester.
Public/Granted literature
- US20100107129A1 Indeterminate State Logic Insertion Public/Granted day:2010-04-29
Information query