Invention Grant
US08148218B2 Semiconductor device with group III-V channel and group IV source-drain and method for manufacturing the same 有权
具有III-V族通道和IV族源极漏极的半导体器件及其制造方法

  • Patent Title: Semiconductor device with group III-V channel and group IV source-drain and method for manufacturing the same
  • Patent Title (中): 具有III-V族通道和IV族源极漏极的半导体器件及其制造方法
  • Application No.: US13044597
    Application Date: 2011-03-10
  • Publication No.: US08148218B2
    Publication Date: 2012-04-03
  • Inventor: Chun-Yen Chang
  • Applicant: Chun-Yen Chang
  • Applicant Address: TW Hsinchu
  • Assignee: National Chaio Tung University
  • Current Assignee: National Chaio Tung University
  • Current Assignee Address: TW Hsinchu
  • Agent Bui Garcia-Zamor; Hung H. Bui, Esq.
  • Priority: TW98140529A 20091127
  • Main IPC: H01L21/335
  • IPC: H01L21/335 H01L21/336
Semiconductor device with group III-V channel and group IV source-drain and method for manufacturing the same
Abstract:
The present invention is related to a semiconductor device with group III-V channel and group IV source-drain and a method for manufacturing the same. Particularly, the energy level density and doping concentration of group III-V materials are increased by the heteroepitaxy of group III-V and group IV materials and the structural design of elements. The method comprises: preparing a substrate; depositing a dummy gate material layer on the substrate and defining a dummy gate from the dummy gate material layer by photolithography; performing doping by self-aligned ion implantation using the dummy gate as a mask and performing activation at high temperature, so as to form source-drain; removing the dummy gate; forming a recess in the substrate between the source-drain pair by etching; forming a channel-containing stacked element in the recess by epitaxy; and forming a gate on the channel-containing stacked element.
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