Invention Grant
- Patent Title: Method for fabricating electrical bonding pads on a wafer
- Patent Title (中): 在晶片上制造电接合焊盘的方法
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Application No.: US12673975Application Date: 2008-06-27
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Publication No.: US08148258B2Publication Date: 2012-04-03
- Inventor: Romain Coffy , Jacky Seiller , Gil Provent
- Applicant: Romain Coffy , Jacky Seiller , Gil Provent
- Applicant Address: FR Grenoble
- Assignee: STMicroelectronics (Grenoble) SAS
- Current Assignee: STMicroelectronics (Grenoble) SAS
- Current Assignee Address: FR Grenoble
- Agency: Gardere Wynne Sewell LLP
- Priority: FR0757254 20070829
- International Application: PCT/EP2008/058239 WO 20080627
- International Announcement: WO2009/027132 WO 20090305
- Main IPC: H01L21/44
- IPC: H01L21/44
Abstract:
A method for fabricating electrical bonding pads on the electrical contact areas of a wafer includes producing first blocks made of a solder material, producing second blocks made of a solder material on these first blocks, and passing the blocks through an oven so as to shape the blocks into approximately domed electrical bonding pads.
Public/Granted literature
- US20110151657A1 METHOD FOR FABRICATING ELECTRICAL BONDING PADS ON A WAFER Public/Granted day:2011-06-23
Information query
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